what impedance of gpio lines/tracks on raspberry pi 3 , other models?
soc support digitally controlled impedance? registers tweak?
further best performance(in terms of eye diagram) can obtained gpio. best termination used.
moved , deleted - off topic discussion
soc support digitally controlled impedance? registers tweak?
further best performance(in terms of eye diagram) can obtained gpio. best termination used.
moved , deleted - off topic discussion
the gpio tracks routing pin header not impedance-controlled or length-matched.
gpio drive has equal rise/fall balance (but not guaranteed across process/temperature). bulk drive strength can adjusted in 8*2ma steps 2ma 16ma (approx). there no facilities precision impedance tuning.
modest decoupling provided each gpio electrical bank. maximum useable i/o clock frequency on gpio pins in range 30-50mhz.
gpio drive has equal rise/fall balance (but not guaranteed across process/temperature). bulk drive strength can adjusted in 8*2ma steps 2ma 16ma (approx). there no facilities precision impedance tuning.
modest decoupling provided each gpio electrical bank. maximum useable i/o clock frequency on gpio pins in range 30-50mhz.
raspberrypi
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